1. Field of the Invention
The present invention relates to a semiconductor integrated circuit testing apparatus for testing semiconductor integrated circuits (as will be referred to as "IC" hereinafter), particularly ICs which are not received in packages, namely, unpackaged ICs, using an apparatus called "wafer prober", and more particularly to such an IC testing apparatus which is configured so as to be accommodated in a small installation area, so that a number of such IC testing apparatus may be installed in a limited floor area.
2. Description of Related Art
It is required to use an apparatus called wafer prober to test ICs to be shipped in the form of either wafer or chip (in an unpackaged state) which is a semi-finished product among other ICs. As will be described below, the wafer prober is equipped on its top with a contact section with which a testing head of the IC testing apparatus is to be brought into contact, and probes adapted to contact with the contact section are disposed within the prober.
The wafer prober transports an IC to be tested in the form of either wafer or chip to a position where the terminals (leads) of the IC comes into contact with the corresponding probes. During the testing operation for ICs to be tested, test signals of a predetermined pattern are sequentially supplied to the testing head of the IC testing apparatus from its IC tester part. The test signals are in turn supplied to the contact section of the wafer prober through a contact means provided in the testing head, and then are applied to the IC under test transported to the above-mentioned position through the probes located beneath the contact section. The response signals from the IC under test are provided to the IC tester part via the reverse path opposite to that described just above. In this manner the testing is conducted on ICs in the form of either wafer or chip.
An example of the construction of the conventional IC testing apparatus of such type will be described with reference to FIGS. 6 and 7. The illustrated IC testing apparatus comprises two wafer probers 10, two rotary drive means 30, each positioned adjacent the associated wafer prober, two testing heads 20, each pivotally or swingably mounted to the associated rotary drive means 30, and a main frame 40 in the shape of a vertically elongated box. While the main frame 40 comprises a cabinet, it is commonly called main frame in the art concerned, and will therefore be referred to as such hereinbelow. Accommodated within the main frame 40 is an IC tester part for generating test signals of a predetermined pattern, address signals, etc. to be applied to ICs to be tested in the wafer prober 10 and for receiving and processing response signals from the ICs under test to measure their electrical characteristics.
The wafer prober 10 has therewithin an automatic transporting apparatus for transporting and handling unpackaged ICs such as ICs in the form of either wafer or chip, and probes adapted to contact with the terminals (leads) of an IC to be tested when the IC is transported in position by the automatic transporting apparatus, whereby the terminals of the IC are presented out through these probes to a contact section 11 comprising a plurality of contact elements located on the top of the wafer prober 10.
The testing head 20 is equipped with a contact means 21 comprising a plurality of contact elements adapted to contact with the contact section 11 located on the top of the wafer prober 10, and is normally in a position where the contact means 21 is in contact with the contact section 11 as shown in solid lines in FIG. 6. With the contact means 21 in contact with the contact section 11, the contact means 21 is directed downwardly and in electrical contact with the contact section 11. Connected with the contact means 21 is a cable, not shown, so that the IC under test is connected with the IC tester part accommodated in the main frame 40 through the probes in the wafer prober 10, the contact section 11, the contact means 21 and the cable to effect the testing of the electrical operation of the IC under test.
The purpose of configuring the testing head 20 so as to be pivotable by the rotary drive means 30 is as follows: During the testing of an IC under test, the testing head 20 is in the position shown in solid lines in FIG. 6 in which it is placed on the contact section 11 of the wafer prober 10 to maintain electrical contact between the IC tester part and the wafer prober 10. When the type of ICs to be tested is to be varied, it may be required to replace the contact section located on the top of the wafer prober 10 and the contact means 21 of the testing head 20, depending on the variation in the number of the terminals of an IC, etc. In order to facilitate the replacement of the contact section 11 and the contact means 21, the testing head 20 is pivotted by the rotary drive means 30 through approximately 180.degree. to be moved from above the top of the wafer prober 10 to the position shown in dotted lines in FIG. 6 and held in that position. The contact section 11 on the top of the wafer prober 10 is thus exposed to provide easy access for replacement. At the same time, the testing head 20 itself is also 180.degree. inverted in its attitude and hence the exposed surface of the contact means 21 is directed upward to provide easy access for replacement.
As discussed above, in the IC testing apparatus employing the wafer prober 10, the arrangement is made for moving the testing head 20 away from the top of the wafer prober 10 while turning the testing head 20 over by the rotary drive means 30 for the purpose of permitting the replacement of the contact section 11 located on the top of the wafer prober 1C as well as the contact means 21 of the testing head 20. In order to provide for pivotal movement of the testing head 20, some space required for carrying out the operation of replacing the contact means 21 of the testing head 20 must be provided in the position where the contact means 21 faces upward. Such space is illustrated at DS in FIGS. 6 and 7.
The space DS is an utterly void area and a wasteful space during the testing of an IC under test. Hereinafter the wasteful space is called dead space DS. Generally, since two wafer probers 10 are used for one main frame 40, one IC testing apparatus usually involves two wafer probers 10, associated two testing heads 20 and two rotary drive means 30 in conjunction with one main frame 40.
As is apparent from FIG. 7 which is a plan view of the IC testing apparatus shown in FIG. 6, on one side of the main frame 40 there is disposed a desk 50 on which a work station for controlling the IC tester part and the like are to be installed. A floor area of about 5 m in width W and about 4.5 m in depth D as shown in FIG. 7 will be required to install one IC testing apparatus having the arrangement as described above. Hence, if four such IC testing apparatus are to be installed and arranged in the layout shown in FIG. 7, a floor area of about 10 m in width W and about 7 m in depth D will be required.
It can thus be understood that installing a number of IC testing apparatus necessarily involves so many dead spaces DS, requiring a large building having a floor space including such many dead spaces DS, which leads to a substantial increase in economic burden.